Test strategy for the PowerPC 750 microprocessor
- 1 January 1998
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Design & Test of Computers
- Vol. 15 (3) , 90-97
- https://doi.org/10.1109/54.706039
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- The PowerPC 603 microprocessor: an array built-in self test mechanismPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Balancing structured and ad-hoc design for test: testing of the PowerPC 603 microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A G3 PowerPC/sup TM/ superscalar low-power microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 250 MHz 5 W RISC microprocessor with on-chip L2 cache controllerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Implementing 1149.1 in the PowerPC RISC microprocessor familyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002