The drain-source protected MNOS memory device and memory endurance

• 1 January 1973
• proceedings article
• Published by Institute of Electrical and Electronics Engineers (IEEE)
• p. 126-129
• https://doi.org/10.1109/iedm.1973.188665

Abstract

Keywords

• PROTECTION
• DIGITAL SIGNAL PROCESSING
• VOLTAGE
• TUNNELING
• LABORATORIES
• WRITING
• LARGE SCALE INTEGRATION
• RANDOM ACCESS MEMORY
• CIRCUITS
• INTRUSION DETECTION