Residue number system error checking using expanded projection

14 October 1982

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 18 (21) , 927-928
https://doi.org/10.1049/el:19820632

Abstract

A new concept called expanded projection is presented that simplifies the process of error detection and location in redundant residue number codes. Expanded projection simplifies the circuit complexity of the error checker, resulting in a structure which is potentially useful for VLSI implementation. It is expected that simplified designs for the error checker will result in more practical applications of residue number arithmetic to achieve fault tolerant performance in special-purpose digital processors.

Keywords

ERROR DETECTION
ERROR LOCATION
VLSI IMPLEMENTATION
REDUNDANT RESIDUE NUMBER CODES
SPECIAL-PURPOSE DIGITAL PROCESSORS
FAULT TOLERANT PERFORMANCE
RESIDUE NUMBER ARITHMETIC
ERROR CHECKING
RESIDUE NUMBER SYSTEM
EXPANDED PROJECTION

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