Latchup Screening of LSI Devices
- 1 January 1978
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 25 (6) , 1534-1537
- https://doi.org/10.1109/tns.1978.4329567
Abstract
An experimental program is outlined which was developed for latchup screening of LSI devices in case the Latchup Analysis Technique cannot be used. The basic approach was to determine the most latchup prone operating conditions experimentally for each LSI type by testing the latchup susceptibilities under hundreds of selected input combinations. The most sensitive conditions are then to be used for the 100% radiation screening of prime parts. The instrumentation required to implement this approach, and the results of the latchup tests obtained for five types of LSI devices are described. The results included the finding of a relatively large temperature effect on latchup sensitivity in CMOS RAMs; the implication of this effect on latchup hardness assurance techniques, such as lot sampling, is also discussed.Keywords
This publication has 3 references indexed in Scilit:
- Technique for Selection of Transient Radiation-Hard Junction-Isolated Integrated CircuitsIEEE Transactions on Nuclear Science, 1976
- Latch-Up in CMOS Integrated CircuitsIEEE Transactions on Nuclear Science, 1973
- Radiation-Induced Integrated Circuit LatchupIEEE Transactions on Nuclear Science, 1969