Comparator-based switched-capacitor circuits for scaled CMOS technologies
- 1 January 2006
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01936530,p. 812-821
- https://doi.org/10.1109/isscc.2006.1696121
Abstract
A comparator-based switched-capacitor (CBSC) design method for sampled-data systems utilizes topologies similar to traditional opamp-based methods but relies on the detection of the virtual ground using a comparator instead of forcing it with feedback. A prototype 10b CBSC 1.5b/stage pipelined ADC is implemented in a 0.18mum CMOS process. The converter operates at 8MHz and consumes 2.5mWKeywords
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