Simulated annealing: a fast heuristic for some generic layout problems
- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 8 references indexed in Scilit:
- Performance of a new annealing schedulePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Optimization by Simulated Annealing: An Experimental Evaluation; Part I, Graph PartitioningOperations Research, 1989
- Simulated Annealing Without Rejected MovesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986
- A Procedure for Placement of Standard-Cell VLSI CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1985
- A Linear-Time Heuristic for Improving Network PartitionsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982
- Probabilistic Analysis of Partitioning Algorithms for the Traveling-Salesman Problem in the PlaneMathematics of Operations Research, 1977
- An Effective Heuristic Algorithm for the Traveling-Salesman ProblemOperations Research, 1973
- The shortest path through many pointsMathematical Proceedings of the Cambridge Philosophical Society, 1959