An analysis of switching effects in high power diffused base silicon transistors

Abstract
An analysis of the switching speed of double diffused silicon transistors in saturating circuits indicated that they were switching much slower than was calculated on first order design theory. An investigation of this behavior led to the conclusion that the effective base width was much wider when the transistor was in saturation than when it was under normal operating conditions. This effect, of course, gives rise to a very long hole storage time. This can be explained by noting that when the transistor is in saturation the hole density at the collector junction greatly exceeds the acceptor concentration in the collector body. Under these conditions the collector junction is forced to move back into the collector until a point is reached where the accepter concentration is higher than the hole density. At this point an effective P-N junction can be formed. When this situation is analyzed mathematically it explains properly the slow switching speed of this transistor type.

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