Josephson two-bit full adder utilizing wide margin functional gates
- 1 May 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Magnetics
- Vol. 19 (3) , 1178-1181
- https://doi.org/10.1109/tmag.1983.1062329
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- Some system implications of a Josephson computer technologyProceedings of the IEEE, 1981
- A parallel full adder circuit using Josephson junctionsIEEE Journal of Solid-State Circuits, 1981
- A four input-and-gate with five asymmetric interferometersIEEE Transactions on Magnetics, 1981
- Coming in SpectrumIEEE Spectrum, 1979
- A Josephson tunnelling logic adderIEEE Transactions on Magnetics, 1974