MOS Device modeling for circuit simulation

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Abstract
This paper reviews the current status of MOS device modeling for circuit simulation. Some important areas for future research are identified. The models covered include those for the drain current, intrinsic device capacitances, and hot-electron effects. For digital applications, only minor modifications are necessary to improve the present drain-current models to cover the submicron regime. For analog applications, however, they are not adequate even at the long-channel level. With the recent introduction of high-precision capacitance measurement techniques, it is anticipated that capacitance models will improve significantly in the near future in terms of both accuracy and computational efficiency. Hot-electron substrate-current models are gradually being used as a first order estimation of hot-electron problems in a VLSI environment. However, it might be still be quite sometime before one can simulate long-term performance degradation of circuits and systems with reasonable accuracy.

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