A new pattern jitter free frequency error detector
- 1 January 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Communications
- Vol. 37 (2) , 159-163
- https://doi.org/10.1109/26.20084
Abstract
-One method to enable fast acquisition of a phase-locked loop (PLL) in spite of large frequency offsets and small PLL bandwidths is to use an additional AFC loop. A suitable frequency error detector (FED) for large frequency offsets is the well-known balanced quadricor- relator. This FED is shown to produce great pattern jitter if it is to work with digital modulated MQAM and MPSK signals (M > 2) and random data. This paper describes how this pattern jitter for MQAM and MPSK signals can be overcome completely. Another understanding of the balance quadricorrelator is also given.Keywords
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