A single-chip NMOS analog front-end LSI for modems
Open Access
- 1 December 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 17 (6) , 1039-1044
- https://doi.org/10.1109/jssc.1982.1051858
Abstract
Presents a fully integrated analog front-end LSI chip which is an interface system between digital signal processors and existing analog telecommunication networks. The developed analog LSI chip includes many high level function blocks such as A/D and D/A converters with 11 bit resolution, various kinds of SCFs, an AGC circuit, an external control level adjuster, a carrier detector, and a zero crossing detector. Design techniques employed are mainly directed toward circuit size reductions. The LSI chip is fabricated in a 5 /spl mu/m line double polysilicon gate NMOS process. Chip size is 7.14/spl times/6.51 mm. The circuit operates on /spl plusmn/5 V power supplies. Typical power consumption is 270 mW. By using this analog front-end LSI chip and a digital signal processor, modern systems can be successfully constructed in a compact size.Keywords
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