ProperHITEC

1 January 1994

conference paper
Published by Association for Computing Machinery (ACM)

p. 717-721
https://doi.org/10.1145/196244.196624

Abstract

—Automatic test pattern generation (ATPG) for sequ ential circuits remains one of the most compute-intensive tasks in the integrated circuit design process. Although numerous,attempts have been made to speed the ATPG process via parallelization, these attempts have often proved disappointing when compared against the best available serial algorithms using metrics of resultant quality and performance. In this paper we introduceProperHITEC, a parallel extension of the HITEC/PROOFS sequential test generation package. ProperHITECembodies a new approach to parallel ATPG; it is incrementally derived from one of the best-performing serial algorithms and this incremental derivation is implemented via the mechanisms of object-oriented programming. Results of runningProperHITECon three parallel architectures, the Sun 4/600MP, the INTEL iPSC/860, and the Encore Multimax are presented. These results show that ProperHITEC achieves results virtually identical in quality to HITEC while achieving significant multiprocessor utilization.

Keywords

This publication has 0 references indexed in Scilit: