Determination of Laplace—Poisson domain interface within semiconductor devices
- 1 January 1970
- journal article
- Published by Institution of Engineering and Technology (IET) in Proceedings of the Institution of Electrical Engineers
- Vol. 117 (5) , 921-926
- https://doi.org/10.1049/piee.1970.0182
Abstract
A method is described for locating the interface boundary between the space-charge-neutral regions in semiconductor devices. This is based on a two-dimensional S.O.R. solution of Poisson's equation for complete depletion within the space-charge region and Laplace's equation within the neutral region. Applications of this 2-dimensional analytical technique are considered, and particular reference is made to the junction field-effect transistor and the metal-oxide-silicon transistor.Keywords
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