Communication Structures for Large Networks of Microcomputers
- 1 April 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-30 (4) , 264-273
- https://doi.org/10.1109/tc.1981.1675774
Abstract
This paper compares nine network interconnection schemes and introduces "dual-bus hypercubes," a cost-effective method of connecting thousands of dual-port single-chip microcomputers into a room-sized information processing system, a "network computer." Each network node is a chip containing memory and a pair of processors for tasks and input/output. Nodes are linked by shared communication buses, each conceptually spanning a D-dimensional, W-wide hypercube of N = WD nodes. Each node shares two buses. Each bus is shared by up to W nodes. The number of bus connections per node is fixed to satisfy chip pin limitations.Keywords
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