A new device interconnect scheme for sub-micron VLSI

• 1 January 1984
• proceedings article
• Published by Institute of Electrical and Electronics Engineers (IEEE)
• https://doi.org/10.1109/iedm.1984.190657

Abstract

Keywords

• ANNEALING
• VERY LARGE SCALE INTEGRATION
• ETCHING
• CONTACT PROCESS
• LITHOGRAPHY