Verifying a logic synthesis tool in Nuprl: A case study in software verification
- 1 January 1993
- book chapter
- Published by Springer Nature
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- The design of a delay-insensitive microprocessor: An example of circuit synthesis by program transformationPublished by Springer Nature ,1990
- Combining engineering vigor with mathematical rigorPublished by Springer Nature ,1990
- MIS: A Multiple-Level Logic Optimization SystemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987