D2 Channel Bank: Digital Functions

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Abstract
This article describes the generation of timing signals and processing of digital information in the D2 Channel Bank. The transmitting portion of the D2 Channel Bank, which has four digital outputs, operates under the control of a single synchronous timing circuit. Because the four digital inputs to the receiving section of the D2 Bank are generally asynchronous, independent timing circuits are used for each of the four inputs. In addition, a separate clock is used in the receiver section to operate a single decoder shared by the four digital inputs. Digital processing of the transmitting terminal includes the serializing of the coder output, inserting of signaling and framing information, and converting the binary code into a bipolar format for transmission over the T1 digital line. To perform the inverse operation just mentioned, the receiving portion of the D2 Bank must extract timing information from the received digital signal and recover the framing information so that the decoded PCM words can be properly demultiplexed. In addition, queuing logic must be performed to permit sharing a single decoder among four asynchronous inputs.

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