Logic delays of 5-μm current-switched Josephson gates
- 15 April 1982
- journal article
- conference paper
- Published by AIP Publishing in Applied Physics Letters
- Vol. 40 (8) , 739-741
- https://doi.org/10.1063/1.93211
Abstract
Logic delays of a current-switched latching gate called the Josephson atto-Weber switch and its use in a dc powered flip-flop module have been investigated. Experimental circuits with cascade chains of 31 gates were fabricated using 5-μm square lead alloy tunnel junctions. Delays were measured on both the latching and the unlatching chains. The experimental circuits demonstrate operation faster than those reported for other Josephson gate designs using the same linewidth. For the latching OR gate with fanout of 3, the shortest measured gate delay is 15 ps.Keywords
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