Implementation of state-space digital filter structures using block floating-point arithmetic
- 24 March 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 12, 908-911
- https://doi.org/10.1109/icassp.1987.1169832
Abstract
Block floating-point arithmetic is considered as an alternative to fixed-point and floating-point arithmetic in the implementation of recursive digital filters. Block floating-point implementation of state-space digital structures is shown to have improved signal-to-noise ratio compared to fixed-point implementation and can be designed to be free of overflow. It is shown that the filter cannot support zero input limit cycle oscillations of period higher than one. An architecture suitable for the VLSI implementation of a block floating point co-processor is described.Keywords
This publication has 3 references indexed in Scilit:
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