Parallel contention resolution control for input queueing ATM switches
- 23 April 1992
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 28 (9) , 838-839
- https://doi.org/10.1049/el:19920530
Abstract
Input queueing ATM switches requiring fast contentionl resolution control have been negatively affected by long turn-around time (TAT) due to the distance between an input port controller and a centralised contention controller. A parallel contention resolution control for input queueing switches is presented. The proposed control allows a TAT of more than one cell slot, resulting in the potential development of a centralised contention controller an ATM switch with an aggregate capacity of 1 Tbit/s.Keywords
This publication has 0 references indexed in Scilit: