High-Energy Physics on DECPeRLe-1 Programmable Active Memory
- 1 January 1995
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The future Large Hadron Collider (LHC) to be built at CERN, by the turn of the millenium, provides an ample source of challenging real-time computational problems. We report here some results from a collaboration between CERN EAST (RD-11) group and DECPRL PAM team. We present the implementations of the three foremost LHC algorithms on DECPeRLe-1. Our machine is the only one which presently meets the requirements from CERN (100 kHz event rate), except for another dedicated FPGA-based board built for just one of the algorithm. All other implementations based on single and multiprocessor general purpose computing systems fall short either of computing power, or of I/O resources or both.Keywords
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