Transmission line clock driver
- 20 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 489-490
- https://doi.org/10.1109/iccd.1999.808585
Abstract
Clock distribution is an important issue in digital design. Engineers want to distribute a square-wave with low skew and fast transition times across very wide chips and they want to do so, wasting as little power as possible. This paper describes a new clock distribution technique utilizing resonant transmission lines that not only reduces clock skew and transition times, but also reduces power consumption by up to an order of magnitude over standard clock driversKeywords
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