Substrate fed logic
- 1 October 1975
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 10 (5) , 336-342
- https://doi.org/10.1109/jssc.1975.1050620
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Terminal-oriented model for merged transistor logic (MTL)IEEE Journal of Solid-State Circuits, 1974
- Integrated injection logic: a new approach to LSIIEEE Journal of Solid-State Circuits, 1972
- Merged-transistor logic (MTL)-a low-cost bipolar logic conceptIEEE Journal of Solid-State Circuits, 1972