Improved Software Reliability Through Requirements Verification
- 1 August 1979
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Reliability
- Vol. R-28 (3) , 233-240
- https://doi.org/10.1109/TR.1979.5220574
Abstract
Requirement errors discovered early in the development process are several orders of magnitude less expensive to fix than if these same errors are discovered late in the development process. Therefore, it is expedient to investigate methods for discovering requirement errors early in the development process. This article decribes a technique to improve software reliability through verifying requirements early in the software development process. The technique involves the generation of a System Verification Diagram (SVD) for each set of functional requirements. The prime purpose of developing SVDs is to serve as a tool for verifying the functional consistency and completeness of a requirement specification. In so doing, it also becomes an excellent communication device for reviewing the requirements to assure that customer needs are not inaccurately portrayed.Keywords
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