10 GBPS over copper lines - state of the art in VLSI
- 1 January 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 491-494
- https://doi.org/10.1109/iwsoc.2005.1
Abstract
This paper outlines some of the problems that VLSI designers are solving and provides some estimates on feasibility of future CMOS devices. We outline some of the challenges for 10GBASE-T and present some of the performance figures that a 10GBASE-T PHY have to meet.Keywords
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