A 4.2-ps logic gate using new Pb-alloy Josephson IC technology

1 February 1985

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters

Vol. 6 (2) , 94-96
https://doi.org/10.1109/edl.1985.26055

Abstract

A high-speed logic gate is attained using new Pb-alloy Josephson IC technology. Three design and fabrication techniques are developed for small Ijscattering. They are a gate pattern design rule using junctions with identical geometrical construction, a double-layer resist stencil technique, and RF oxidation in CO2plasma. A high-gain direct-coupled Josephson logic (HDCL) gate cascade chain is experimentally fabricated using a new 2-µm process developed from this technology. At a high current density of 10 kA/cm², high quality junctions are obtained with a small Ijscattering of &sigma = 6.8 percent. A very fast switching speed of 4.2 ps/gate is achieved.

Keywords

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