On the Design of Logic Networks with Redundancy and Testability Considerations

1 November 1974

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers

Vol. C-23 (11) , 1139-1149
https://doi.org/10.1109/T-C.1974.223821

Abstract

The presence of redundancy in combinational networks increases the cardinality of the test set to detect all stuck-at-faults. A solution to this problem is to identify and remove all redundancies in the networks before deriving test sets. It is shown in this paper that the identification of redundancy in arbitrary combinational networks is an extremely tedious problem.

Keywords

REDUNDANCY
LOGIC NETWORKS
COMBINATIONAL NETWORKS
DERIVING TEST
TESTABILITY CONSIDERATIONS
EXTREMELY TEDIOUS
NETWORKS INCREASES
ARBITRARY COMBINATIONAL
TEDIOUS PROBLEM

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