(N, K) Concept Fault Tolerance
- 1 April 1986
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-35 (4) , 339-349
- https://doi.org/10.1109/tc.1986.1676767
Abstract
This paper describes a new fault-tolerant computer architecture based on a "distributed implementation" of a symbol- error correcting code. In this, as at is called, (N, K) concept the faults are masked by this code. The (N, K) concept is described in detail for N = 4 and K = 2. It is shown that symbol-error correcting codes having additional bit-error correcting capabilities make additional memory protection by means of bit-error correcting codes superfluous and a newly designed symbol-and bit- error correcting code for theThis publication has 9 references indexed in Scilit:
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