Sub-15 ps gate delay with new AC-coupled active pull-down ECL circuit
- 9 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 1 reference indexed in Scilit:
- 50-GHz self-aligned silicon bipolar transistors with ion-implanted base profilesIEEE Electron Device Letters, 1990