Clock-feedthrough compensated sample/hold circuits
- 15 September 1988
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 24 (19) , 1226-1228
- https://doi.org/10.1049/el:19880834
Abstract
A novel circuit technique is presented to eliminate the clock feedthrough effect in a sample/hold circuit. The device requirement is minimal, and thus it is quite useful for CMOS monolithic implementation of precise sampled analogue signal processing circuits. Experimental waveforms are also given to demonstrate its validity.Keywords
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