Optical Implementation And Performance Of One-Dimensional And Two-Dimensional Trimmed Inverse Augmented Data Manipulator Networks For Multiprocessor Computer Systems

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Abstract
Two classes of 0(N log(N)) network architectures known as one-dimensional trimmed inverse augmented data manipulator networks and two-dimensional trimmed inverse augmented data manipulator networks are described. These network architectures, which are derived from augmented data manipulator networks, may find potential applications as optical interconnection networks for multiprocessor computer systems. Comparisons between the network types are made based on hardware complexity and blocking probability. It is shown that pairs of extra stages (added to the input end and the output end of the networks) and the extra connectivity provided by two-dimensional optical interconnections can improve blocking probability if an increase in hardware cost is permissible. A potential optical implementation of the network, which uses computer-generated binary phase gratings, is described.

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