Evaluation of a 32-bit microprocessor with built-in concurrent error-detection
- 22 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 07313071,p. 42-46
- https://doi.org/10.1109/ftcs.1997.614076
Abstract
This paper describes the test results from heavy ion testing of ERC32, a 32-bit processing core with on-chip concurrent error-detection. The parity based error-detection mechanisms succeeded in detecting more than 97.5% of all injected errors, significantly reducing the MTBF for undetected SEU errors. Most errors occurred in registers, but some errors in combinational logic could also be observed. The cross-section for errors in combinational logic is however too small to have an influence on the overall error rate. The conclusion is therefore that parity based error-detection is well suited to detect SEU errors in VLSI devices for space applications.Keywords
This publication has 1 reference indexed in Scilit:
- Techniques of Microprocessor Testing and SEU-Rate PredictionIEEE Transactions on Nuclear Science, 1985