A 1860 kG CMOS gate array with GTL input flip-flop circuits
- 23 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- A CMOS low-voltage-swing transmission-line transceiverPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A CMOS gate array with dynamic-termination GTL I/O circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 133 MHz 64 b four-issue CMOS microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 300 MHz 64 b quad-issue CMOS RISC microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002