A SPICE modeling technique for GaAs MESFET IC's
- 1 May 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 32 (5) , 996-998
- https://doi.org/10.1109/t-ed.1985.22060
Abstract
A vertically integrated device modeling technique for GaAs IC's is presented for use in circuit simulation. Most of the SPICE2 capability can be utilized for modeling the gate transit time and parasitic effects. A computer program has also been developed to extract model parameters from the measured device data.Keywords
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