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A symmetric submicron CMOS technology
Home
Publications
A symmetric submicron CMOS technology
A symmetric submicron CMOS technology
SH
S.J. Hillenius
S.J. Hillenius
RL
R. Liu
R. Liu
GG
G.E. Georgiou
G.E. Georgiou
RF
R.L. Field
R.L. Field
DW
D.S. Williams
D.S. Williams
AK
A. Kornblit
A. Kornblit
DB
D.M. Boulin
D.M. Boulin
RJ
R.L. Johnston
R.L. Johnston
WL
W.T. Lynch
W.T. Lynch
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1 January 1986
proceedings article
Published by
Institute of Electrical and Electronics Engineers (IEEE)
https://doi.org/10.1109/iedm.1986.191162
Abstract
No abstract available
Keywords
DIODES
DOPING
THRESHOLD VOLTAGE
DESIGN OPTIMIZATION
CONDUCTIVITY
SILICON
CMOS TECHNOLOGY
RING OSCILLATOR
Cited
Cited by 48 articles
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