Microprogrammable sequential controller

Abstract
The architecture and design of a high-performance general-purpose microprogrammable sequential controller are presented. Conventional logic controllers are limited by speed, memory requirements or flexibility and programming ease. The requirements of a basic sequential controller are identified, and a memory segmentation technique is proposed for efficient data structuring. A parallel-architecture sequential controller is designed so that it is both fast and memory efficient. The new controller has a fixed hardware and is microprogrammable through firmware modification. It is especially designed for complex high-speed sequential controllers requiring large I/O capabilities.

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