HERCULES-a system for high-level synthesis
- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 483-488
- https://doi.org/10.1109/dac.1988.14803
Abstract
An approach is presented to high-level synthesis of VLSI processors and systems. Synthesis consists of two phases: behavioral synthesis, which involves implementation-independent representations: and structural synthesis which relates to the transformation of a behavior into an implementation. The authors describe the HERCULES system and address the hardware description problem, behavioral synthesis, optimization using a method called the reference stack and the mapping of behavior onto a structure. They present a model for control based on sequencing graphs that supports multiple threads of execution flow, allowing varying degrees of parallelism in the resulting hardware. Results are presented for three examples: the MC 6502, Intel 8251, and FRISC, a 16-bit microprocessor.> Author(s) De Micheli, G. Comput. Syst. Lab., Stanford Univ., CA, USA Ku, D.C.Keywords
This publication has 8 references indexed in Scilit:
- MIS: A Multiple-Level Logic Optimization SystemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Flamel: A High-Level Hardware CompilerIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Statistics for parallelism and abstraction level in digital simulationPublished by Association for Computing Machinery (ACM) ,1987
- Knowledge based control in micro-architecture designPublished by Association for Computing Machinery (ACM) ,1987
- Automated Synthesis of Data Paths in Digital SystemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986
- Distributed process groups in the V KernelACM Transactions on Computer Systems, 1985
- MacPitts: An Approach to Silicon CompilationComputer, 1983
- Automated Synthesis of Digital HardwareIEEE Transactions on Computers, 1982