A dual-port SRAM compiler for 0.8- mu m 100 K BiCMOS gate arrays

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9 December 2002

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 22.4/1-22.4/3
https://doi.org/10.1109/cicc.1991.164066

Abstract

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BiCMOS submicron compiler memories
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002