A 40-GHz Frequency Divider in 0.18-$muhboxm$CMOS Technology
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- 30 March 2004
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 39 (4) , 594-601
- https://doi.org/10.1109/jssc.2004.825119
Abstract
An analysis of regenerative dividers predicts the required phase shift or selectivity for proper operation. A divider topology is introduced that employs resonance techniques by means of on-chip spiral inductors to tune out the device capacitances. Configured as two cascaded /spl divide/2 stages, the circuit achieves a frequency range of 2.3 GHz at 40 GHz while consuming 31 mW from a 2.5-V supply.Keywords
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