A hardware accelerator for speech recognition algorithms
- 1 May 1986
- journal article
- Published by Association for Computing Machinery (ACM) in ACM SIGARCH Computer Architecture News
- Vol. 14 (2) , 216-223
- https://doi.org/10.1145/17356.17382
Abstract
This paper describes two custom architectures tailored to a speech recognition beam search algorithm. Both architectures have been simulated using real data and the results of the simulation are presented. The paper also describes the design process of the custom architectures and presents a number of ideas on the automatic design of custom systems for data dependent computations.Keywords
This publication has 11 references indexed in Scilit:
- Instruction issue logic for pipelined supercomputersPublished by Association for Computing Machinery (ACM) ,1984
- The design and implementation of a VLSI chess move generatorPublished by Association for Computing Machinery (ACM) ,1984
- Automatic synthesis of systolic arrays from uniform recurrent equationsPublished by Association for Computing Machinery (ACM) ,1984
- Dynamic Time Warp Pattern Matching Using an Integrated Multiprocessing ArrayIEEE Transactions on Computers, 1983
- Research on synthesis of concurrent computing systems (Extended Abstract)Published by Association for Computing Machinery (ACM) ,1983
- An Expression Model for Extraction and Evaluation of Parallelism in Control StructuresIEEE Transactions on Computers, 1982
- Inductive learning of structural descriptions: Evaluation criteria and comparative review of selected methodsArtificial Intelligence, 1981
- A level building dynamic time warping algorithm for connected word recognitionIEEE Transactions on Acoustics, Speech, and Signal Processing, 1981
- A Flow Analysis Procedure for the Translation of High-Level Languages to a Data Flow LanguageIEEE Transactions on Computers, 1980
- A Survey of Parallel Machine Organization and ProgrammingACM Computing Surveys, 1977