A novel FET structure of buried plated heat sink for superior high performance GaAs MMICs

Abstract
A novel FET structure with buried plate heat sink is proposed which gives higher power output and power added efficiency with easy wafer and chip handling. The substrate thickness is extremely thin (30 mu m) with a 70- mu m-thick gold-plated heat sink for the FET region, and it is 100- mu m for the remaining part of the chip. The buried plated heat sink FET with a gate width of 350 mu m provides a superior low thermal resistance of 16 degrees C/W, a power output as high as 27.9 dBm with an excellent power added efficiency of 32% at 1-dB compression point, and a linear power gain of 8.3 dB at 18 GHz. The fabrication technique, the structural reliability, the thermal resistance, and the RF performances of the newly developed FETs are presented.

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