FPGA implementation of the BH8000 wormhole router

9 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. P16-3/1
https://doi.org/10.1109/asic.1991.242882

Abstract

A Xilinx FPGA was chosen for prototyping a self-timed message routing device. The authors' experience in implementing an asynchronous design on an FPGA, which like most other programmable logic is optimised for synchronous designs, is described. The manual intervention needed at various stages of design implementation is discussed. Debugging and performance issues are looked at and some modifications to the FPGA architecture are suggested.

Keywords

FIELD PROGRAMMABLE GATE ARRAYS
PROTOTYPES
ROUTING
APPLICATION SPECIFIC INTEGRATED CIRCUITS
LOGIC DESIGN
DEBUGGING
LOGIC TESTING
PROGRAMMABLE LOGIC ARRAYS
PROGRAMMABLE LOGIC DEVICES
DESIGN OPTIMIZATION

This publication has 1 reference indexed in Scilit:

The iPSC/2 direct-connect communications technology
Published by Association for Computing Machinery (ACM) ,1988