States of sequential machines whose logical elements involve delay

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Abstract
There are synchronous sequential machines which cannot conveniently be described by the conventional models when one permits delays in the logical elements themselves. An algebra useful in the design of these circuits is due originally to Tryon and is detailed by the present author in (1). When the delays are taken into account, new temporal relations between states, inputs, and outputs appear. The input coincident with or nearest following a given state will be called the proximate input of that state. When the output can be expressed in terms of a state alone, the output coincident with or nearest following a given state will be called the proximate output of that state. The basic relationship between state, input, and output is then that the present state uniquely determines the proximate output and that the present state and the proximate input uniquely determine the next state. When the output depends on both the state and the input, the output coincident with or nearest following the proximate input of a given state will be called the proximate output of that state and input. In this case, the present state and the proximate input uniquely determine the proximate output and the next state. The paper presents the issues involved informally by means of examples.

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