Gated Integrator for Repetitive Signals

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Abstract
A gated integrator, using standard analog computing amplifiers, is described. Because of the placement of the diode gate within the feedback integrating loop, many of the previous requirements of high quality insulation and high input impedance electrometers are eliminated. The ``holding time'' of the integrator is such that, for an ``integrating time'' of 10−4 sec, the time required for a drift of 1% of full‐scale (50V output) is at least 17 min. The minimum sampling time is 0.5 μsec. A method for taking data using two such integrators and a calibrated signal is also presented.

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