Predicting transistor storage time for nonstep, quasi-voltage inputs

1 November 1962

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IRE Transactions on Electron Devices

Vol. 9 (6) , 492-499
https://doi.org/10.1109/t-ed.1962.15025

Abstract

The differential equation which has been derived by earlier workers for minority carrier storage in the base of a one-dimensional transistor model has been solved for storage time assuming a general, time dependent, OFF base current. Specific base currents treated include those encountered when driving the base with a step, ramp, or exponential voltage in series with a speed-up network. The theoretical results are compared with the storage time observed for germanium mesa, MADT,d PADT, and epitaxial transistors in the common emitter configuration. Although the solution obtained assumes minority carriers are stored predominately in the base, the agreement between theory and observed results for mesa units, which have carrier storage in the collector also, is good.

Keywords

This publication has 5 references indexed in Scilit:

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Proceedings of the IRE, 1960
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