SILO isolation technique: A study of active and parasitic device characteristics with semi-recessed and fully-recessed field oxides
- 1 May 1988
- journal article
- Published by Elsevier in Solid-State Electronics
- Vol. 31 (5) , 887-891
- https://doi.org/10.1016/0038-1101(88)90042-1
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
- Physical and electrical characterization of a SILO isolation structureIEEE Transactions on Electron Devices, 1985
- Analysis of an anomalous subthreshold current in a fully recessed oxide MOSFET using a three-dimensional device simulatorIEEE Transactions on Electron Devices, 1985
- Evaluation of Dislocation Generation on Silicon Substrates by Selective OxidationJournal of the Electrochemical Society, 1983
- The sloped-wall SWAMI—A defect-free zero bird's-beak local oxidation process for scaled VLSI technologyIEEE Transactions on Electron Devices, 1983
- Selective polysilicon oxidation technology for VLSI isolationIEEE Transactions on Electron Devices, 1982
- Direct moat isolation for VLSIIEEE Transactions on Electron Devices, 1982