The nonuniform distribution of instruction-level and machine parallelism and its effect on performance
- 1 January 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 38 (12) , 1645-1658
- https://doi.org/10.1109/12.40844
Abstract
No abstract availableThis publication has 13 references indexed in Scilit:
- A 1,000,000 transistor microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- The performance potential of multiple functional unit processorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Available instruction-level parallelism for superscalar and superpipelined machinesPublished by Association for Computing Machinery (ACM) ,1989
- The Mahler experience: using an intermediate language as the machine descriptionACM SIGARCH Computer Architecture News, 1987
- Instruction issue logic for high-performance, interruptable pipelined processorsPublished by Association for Computing Machinery (ACM) ,1987
- Global register allocation at link timePublished by Association for Computing Machinery (ACM) ,1986
- Instruction Issue Logic in Pipelined SupercomputersIEEE Transactions on Computers, 1984
- Design of a High Performance VLSI ProcessorPublished by Springer Nature ,1983
- The Inhibition of Potential Parallelism by Conditional JumpsIEEE Transactions on Computers, 1972
- Detection and Parallel Execution of Independent InstructionsIEEE Transactions on Computers, 1970