Unbounded Transactional Memory

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Abstract
Hardware transactional memory should supportun- bounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of un- bounded transactional memory, called UTM, which ex- ploits the common case for performance without sacri- ficing correctness on transactions whose footprint can be nearly as large as virtual memory. We performed a cycle- accurate simulation of a simplified architecture, called LTM. LTM is based on UTM but is easier to implement, because it does not change the memory subsystem outside of the processor. LTM allows nearly unbounded transac- tions, whose footprint is limited only by physical memory size and whose duration by the length of a timeslice. We assess UTM and LTM through microbenchmark- ing and by automatically converting the SPECjvm98 Java benchmarks and the Linux 2.4.19 kernel to use transac- tions instead of locks. We use both cycle-accurate simu- lation and instrumentation to understand benchmark be- havior. Our studies show that the common case is small transactions that commit, even when contention is high, but that some applications contain very large transac- tions. For example, although99.9% of transactions in the Linux study touch 54 cache lines or fewer, some transac- tions touch over 8000 cache lines. Our studies also indi- cate that hardware support is required, because some ap- plications spend over half their time in critical regions. Finally, they suggest that hardware support for transac- tions can make Java programs run faster than when run using locks and can increase the concurrency of the Linux kernel by as much as a factor of4 with no additional pro- gramming work.

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