A Low-Jitter PLL and Repeaterless Clock Distribution Network for a 20Gb/s Link
- 24 October 2006
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 2 references indexed in Scilit:
- A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B.Published by Institute of Electrical and Electronics Engineers (IEEE) ,2006
- Jitter in ring oscillatorsIEEE Journal of Solid-State Circuits, 1997