Hybrid integration of III-V optoelectronic devices on Si platform using BCB

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Abstract
Inadequate performance of interconnects in emerging integrated circuitry has generated a need for alternative signal transmission solutions. Integration of dense arrays of high frequency III-V photoemitters and photodetectors with Si platform is one of the challenging tasks. Comparison of monolithic and hybrid integration technologies highlights the advantages of hybrid approaches at least for emitters highly sensitive to growth defects. A novel protocol for fabrication of III-V optoelectronic components such as LEDs, VCSELs and photodetectors on Si platform is proposed. The simulations of thermal behavior and mechanical stresses of this integration scheme was performed using finite element analysis and revealed adequate heat dissipation. Simulations show that this protocol allows to reduce overheating and mechanical stresses to enhance the optoelectronic devices performance and increase their lifetime. The III-V structures are grown homoepitaxialy on GaAs substrate, then bonded to a Si wafer using low-temperature polymer followed by wet etching of the substrate. The scheme involves VCSEL processing with coplanar metallization on Si with PMGI reflow planarization. MBE-grown reversed VCSEL structure was used for manufacturing of the test devices using this novel protocol. An AlAs etch stop layer was imbedded into the structure. 10 um thick VCSEL structure was bonded on Si using BCB (CycloteneTM). Substrate was completely removed by selective etching to reduce thermal stresses to enhance the optoelectronic devices performance and increase their lifetime. The array of the 3D devices was fabricated using wet etching. A 10 um-thick high frequency VCSEL with coplanar metallization is processed on Si with PMGI reflow planarization. Electro-luminescence spectrum, I-V and P-T characteristics were measured and compared with a reference structure. It was found that measured thermal impedance is about five times higher than for devices on a host GaAs wafer. Simulation of thermal behavior was done for bonded and non-bonded structure. It was found that measured values of thermal impedance are in good agreement with simulation results.

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